1. Field of the Invention
The present invention relates to a semiconductor memory device which employs a plurality of memory cells each including a magnetic memory element having a storage layer for holding bit data as a direction of the magnetization state of the storage layer and allows new bit data to be written over bit data already stored in the storage layer of a magnetic memory element by flowing a current to the storage layer in order to invert the direction of magnetization. In addition, the present invention also relates to a method for reading out bit data from the semiconductor memory device.
2. Description of the Related Art
In recent years, as a new nonvolatile memory making use of a magnetic material, an MRAM (magnetic random access memory) has been attracting attention.
The MRAM employs a large number of memory cells each including a magnetic memory element used for storing information (that is, bit data) and an access transistor. The magnetic memory element has a structure of stacked layers including a storage layer made of a ferromagnetic material and used for storing bit data as a direction of the magnetization state of the ferromagnetic material, a tunnel insulation layer and a fixed-magnetization layer having a fixed direction of magnetization.
In the magnetic memory element having such a structure of stacked layers, the so-called tunnel magnetization resistance effect is observed to give an observation result determined by an angle formed by the direction of the magnetization state of the storage layer and the direction of the magnetization state of the fixed-magnetization layer. The tunnel magnetization resistance effect is a phenomenon in which a resistance against a tunnel current flowing through the magnetic memory element changes in accordance with the angle formed by the direction of the magnetization state of the storage layer and the direction of the magnetization state of the fixed-magnetization layer. That is to say, the resistance against a tunnel current is the result of the observation. The resistance has a minimum value if the direction of the magnetization state of the storage layer is the same as the direction of the magnetization state of the fixed-magnetization layer, forming an angle of 0 degrees. If the direction of the magnetization state of the storage layer is opposite to the direction of the magnetization state of the fixed-magnetization layer, forming an angle of 180 degrees, on the other hand, the resistance has a maximum value.
In the following description, the magnetic memory element displaying such a property is referred to as a TMR (tunnel magnetic resistance) element.
The tunnel magnetic resistance element TMR is connected to the word and bit lines typically as shown in FIG. 1, which is a diagram showing the configuration of a memory cell having a parallel common line type. The configuration of a memory cell having a parallel common line type can be explained by referring to the figure as follows. The word line WL is a line conveying a signal for turning the access transistor AT on or off in order to respectively select or deselect the memory cell employing the transistor AT. The word line WL is a control line common to memory cells arranged in the row direction. On the other hand, the bit line BL serving as a control line common to memory cells arranged in the column direction connects a particular one of the terminals of the tunnel magnetic resistance element TMR employed in each of the memory cells which each also include an access transistor AT as described above. Each of the particular terminals connected by the bit line BL to each other is a terminal on a particular side of the tunnel magnetic resistance element TMR included in the memory cell. The particular side of the tunnel magnetic resistance element TMR is the side opposite to the side on which the access transistor AT is provided. That is to say, the other terminal of the tunnel magnetic resistance element TMR is connected to drain of the access transistor AT. The source of the access transistor AT is connected directly to a source line SL. The bit line BL and the source line SL serve as lines applying voltages to the memory cell as voltages for storing bit data into a memory cell connected to the bit line BL and the source line SL or reading out bit data from the memory cell. An operation to write bit data into a tunnel magnetic resistance element TMR is carried out by controlling the magnetization state of the storage layer of the tunnel magnetic resistance element TMR by asserting the voltages on the bit line BL and the source line SL. In addition to the voltages asserted on the bit line BL and the source line SL, the magnetization state of the storage layer of the tunnel magnetic resistance element TMR is also controlled by making use of a compound current magnetic field generated by flowing currents through both the word line WL and a bit line BL perpendicular to the word line WL.
Bit data of 1 or 0 is stored in a memory cell as respectively two directions of the magnetization of the storage layer included in the tunnel magnetic resistance element TMR employed in the memory cell. For example, the bit data having the value of 0 is stored in the memory cell as the same direction of magnetization as the direction of the magnetization state of the fixed-magnetization layer included in the tunnel magnetic resistance element TMR. On the other hand, the bit data having the value of 1 is stored in the memory cell as the magnetization-state direction opposite to the direction of the magnetization state of the fixed-magnetization layer.
In an operation to read out bit data from a tunnel magnetic resistance element TMR employed in a memory cell of an MRAM, on the other hand, first of all, the memory cell is selected by activating the access transistor AT employed in the same memory cell as the tunnel magnetic resistance element TMR. As described above, the access transistor AT is activated by putting the word line WL in an active state. Then, a read voltage determined in advance is asserted on the bit line BL connected to the tunnel magnetic resistance element TMR in order to flow a read tunnel current through the tunnel magnetic resistance element TMR, and a tunnel magnetic resistance effect of the tunnel magnetic resistance element TMR is detected as an effect resulting from the flowing of the current. In a word, the magnitude of the resistance of the tunnel magnetic resistance element TMR is detected. As described above, the magnitude of the resistance indicates an angle formed by the direction of the magnetization state of the storage layer and the direction of the magnetization state of the fixed-magnetization layer. That is to say, the magnitude of the resistance represents the value of bit data stored in the memory cell. By turning on the access transistor AT as described above, the read tunnel current flows to the tunnel magnetic resistance element TMR and the resistance against the current is determined by the value of the bit data stored in the memory cell. That is to say, by detecting the read tunnel current which is determined by the resistance, it is possible to determine whether the stored bit data has a value of 1 or 0.
However, the MRAM device demands that large currents be flowed to two wires having directions perpendicular to each other as described above in order to generate a write magnetic field (or the compound magnetic field cited before) in a write operation. The two wires are an external-magnetic-field generation line HWL parallel to the word line WL and the bit line BL perpendicular to the word line WL as shown in FIG. 1. Thus, the MRAM device has a shortcoming that, as the MRAM device is miniaturized, the wires also becomes thin, making it difficult to flow sufficient currents through the wires.
In order to solve this problem, a spin injection memory has been introduced and has been attracting attention. The spin injection memory is a memory utilizing a spin transfer for inverting magnetization so that magnetization can be inverted by making use of smaller currents. For more information on the spin injection memory, the reader is suggested to refer to document such as Japanese Patent Laid-open No. 2006-196613.
To put it in detail, in the spin injection memory, by injection of electrons each experiencing spin polarization in passing through a specific magnetic substance into another magnetic substance provided as an information storage ferromagnetic layer, the magnetization of the other magnetic substance is inverted.
To put it more concretely, when electrons each experiencing spin polarization in passing through the magnetic substance serving as a fixed-magnetization layer having a fixed-magnetization direction enter the ferromagnetic layer serving as the information storage layer having a reversible direction of magnetization in a write operation, each of the electrons applies a spin torque to the information storage layer. At that time, if a current having a magnitude at least equal to a threshold value is flowed, a magnetization inversion phenomenon occurs in the ferromagnetic layer serving as the information storage layer, causing new bit data to be written over bit data already stored in the information storage layer.
It is to be noted that the direction of the current to be flowed is determined by whether the bit data to be stored is 1 or 0. That is to say, a current is flowed from the fixed-magnetization layer to the storage layer in an operation to store bit data having one of the two values whereas a current is flowed from the storage layer to the fixed-magnetization layer in an operation to store bit data having the other value.
Much like the existing MRAM, an operation to read out bit data from the spin injection memory is carried out by detecting the tunnel magnetic resistance effect. That is to say, by detecting a read tunnel current, the magnitude of which is determined by a resistance against the current, it is possible to determine whether the stored bit data has the value of 1 or 0 since the resistance represents the value of the bit data.
The spin injection memory offers a merit that inversion of magnetization by a spin transfer occurs without the need to increase the magnitude of the flowing write current in a write operation. That is to say, inversion of magnetization by a spin transfer occurs even if the spin injection memory is miniaturized because the magnetization inversion by a spin transfer can be carried out at a small flowing current entailed by miniaturization of the memory. In addition, the spin injection memory offers a merit that the spin injection memory does not demand an external-magnetic-field generation line (the line HWL shown in FIG. 1) which is needed by the existing MRAM.
Nevertheless, there has also been proposed a hybrid magnetic memory element to which an external magnetic field generated by making use of an external-field generation line demanded in the existing MRAM is applied in case the direction of the magnetization of the storage layer cannot be sufficiently inverted by making use of a write current flowing through the hybrid magnetic memory element. This hybrid magnetic memory element is described in document such as Japanese Patent Laid-open No. 2006-210711 (hereinafter, referred to as Patent Document 2).
In accordance with a technology described in Patent Document 2, in an operation to store new bit data in a magnetic memory element over bit data already stored in the magnetic memory element, while a write current is being flowed to the hybrid magnetic memory element, an external-field generation line is used to generate an external magnetic field for helping the write current invert the direction of magnetization. Thus, the hybrid magnetic memory device offers a merit that the direction of the magnetization of the storage layer can be inverted with ease in an operation to store new bit data in a magnetic memory element over bit data already stored in the magnetic memory element.